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QCFA

Quantum Chip Failure Analysis

Quantum computing based on superconducting circuits has made tremendous progress in recent years, with increasing qubit coherence times and circuit complexity. As research systems transition toward more integrated and scalable devices, the reliability and robustness of the chip packaging become critical to performance and yield. While the quantum states themselves operate at cryogenic temperatures, the overall device lifecycle involves repeated transitions between room temperature & millikelvin

Quantum processors grow in scale and complexity

The reliability of the packaging of superconducting quantum chips has become a major bottleneck for scaling up quantum hardware. Throughout their lifetime, these chips are repeatedly subjected to temperature variations between room temperature and cryogenic conditions. Such thermal cycling induces mechanical stress and material degradation that can lead to device failure or performance degradation. However, there is currently no systematic understanding of how thermal cycling specifically affects the interfaces and bonds within superconducting chip packages.

Facts & figures
  • Scheme: PPS-I Strategische Programma's
  • Programme: Quantum Technologies | 2024-2027
  • Total budgeted project costs: € 169.107,00
  • Project start date: 1 January 2026
  • Project end date: 31 December 2030
Project managers
Project consortium
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