In 2021, Europe set itself an ambitious goal of bringing semiconductor production back within its borders, with the aim of capturing 20% of the global semiconductor value chain by 2030. Initially, this effort focused primarily on front-end technologies such as wafer fabrication. However, in his recent report, The Future of European Competitiveness (2024), Mario Draghi emphasised, however, that back-end technologies, particularly advanced chip packaging, must also be included in this vision and given greater attention in the coming years.
The growing interest in advanced packaging, as a key technology for extending Moore’s Law, stems from the increasing complexity of semiconductors and the shift towards higher levels of chip integration (i.e. combining different semiconductor and even photonics front-end technologies into a single package). This means that the design and manufacture of both the ‘chip’ and the ‘package’ must be carried out jointly. A good example of this is the upcoming wave of 6G radio chips, such as those being developed by NXP, where the antenna requirements are so stringent that they must be integrated directly into the chip’s package. For this reason, major semiconductor front-end players such as TSMC and Intel are investigating whether they can once again develop advanced chip packaging in-house. As BCG puts it: “Packaging will become a driver of innovation, a point of differentiation that is crucial to system performance.”
If Europe is serious about maintaining a competitive edge in semiconductor manufacturing, it must also invest in developing expertise in ‘advanced packaging’. This is why advanced packaging is one of the three pillars of the chipNL plan. And it is also why advanced packaging is likely to play a crucial role in the upcoming ChipAct2 initiative.
The ‘Advanced Chip Packaging’ Strategic Programme is derived from the chipNL plan and is closely aligned with chipNL’s overall objectives:
Sustainability: Ensure circularity in the value chain, lower energy consumption and reduced use of harmful raw materials, such as PFAS.
Efficiency: Achieve productivity gains through technological innovations, thereby enabling the necessary growth within a tight labour market.
Value creation: Create forward-looking new products and businesses.
Sustainability: Ensure circularity in the value chain.
Programme duration: 3 years | 2025–2027
Research question
Traditional and advanced packaging
In very simple terms, traditional packaging consists of a number of process steps. In the first step, one or more integrated circuits (ICs) are positioned on a lead frame or substrate through assembly. In a second step, these ICs are electrically connected. In a third step, the assembly is enclosed in a plastic housing and finally fitted with finished contact points.
In the transition to ‘advanced packaging’, this process flow will largely be followed, but additional technological challenges will arise as the complexity of the chip package increases. Consider, for example, the emerging field of integrated photonics. This will necessitate the development of packages in which photonic and electrical components must be combined. However, 6G communications will also present challenges in the field of packaging. There will be a need to integrate complex antenna structures directly into the package (rather than on the PCB), as otherwise the required performance cannot be achieved.
Impact on costs and the environment
Traditionally, etching processes are used to produce lead frames and substrates, whereby excess material is removed to create the semi-finished products. This etching process is highly environmentally unfriendly because it uses aggressive chemicals and, moreover, proportionally very little of the material actually ends up in the end product. For encapsulation with plastic, (compression) moulding is almost always used, whereby a thermosetting plastic is poured into a mould around the products. The moulds used are expensive and, moreover, the plastics used cannot be recycled. Wire bonding is often used to connect the IC to the lead frame. This is a time-consuming process, as each wire must be connected to the lead frame individually. Wire bonding is therefore a major cost factor in the production process. On the one hand, there is a trend from traditional to advanced packaging, whereby more functionality must be integrated into the package. On the other hand, the current method of packaging has a cost structure and environmental impact that is not attractive to Europe, and therefore also to the Netherlands. To address this, the current proposed programme has identified three key problems that need to be resolved.
Problem 1: High cost structure
The barrier to packaging a first chip is high due to the enormous initial costs. It requires substantial investment in equipment, but there are also high costs per chip design, for example for special moulding dies. This is particularly problematic for small production runs, where margins are smaller and every additional cost item carries greater weight. These initial costs must ultimately be recouped, which is more difficult with smaller production runs, as the costs are spread across fewer units. Optimising production costs in Europe requires a holistic approach, centred on the co-design of chip and package. Combining equipment, materials and processes, and applying methods such as Design for Test (DfT), Design for Reliability (DfR) and Design for Inspection (DfI) will help to control costs. Development and engineering costs (NRE) can be significantly reduced with this approach, particularly for smaller production runs.
Problem 2: High environmental footprint
The packaging industry has a significant environmental footprint, including the etching process described above. The environmental impact is mainly due to the use of specialised materials and complex production processes. As the packaging must protect the chips from physical damage, moisture and electrostatic discharge, plastics, metals and other non-biodegradable materials are used. Furthermore, their production requires significant amounts of energy, natural resources and raw materials, resulting in high greenhouse gas emissions. Moreover, the packages are often difficult to recycle due to the combination of different materials and the need to ensure the integrity of the chips. After use, many of these packages end up in landfills, where they contribute to environmental pollution and the accumulation of waste. Developing more sustainable packaging solutions and improving recycling methods are crucial steps towards reducing the environmental impact of the semiconductor industry and promoting a more sustainable future.
Problem 3: The need for new processes and materials
The transition from traditional packaging to advanced packages brings with it new challenges. New materials and processes will need to be developed to add new functionality to the package. Examples include: new assembly/interconnect technologies, the integration of microfluidic functionality and new encapsulation methods. But also the combination of electronics and photonics in a single package. These new technologies and processes must be manufacturable, reliable and cost-competitive. The Netherlands is a key global supplier of new machinery and materials and can therefore create added value for the packaging industry.
Objective
The ‘Advanced Packaging’ Strategic Programme aims to address the issues outlined above. To achieve this, public-private partnerships are being encouraged to drive breakthroughs in advanced chip packaging, divided into the following four areas:
The use of additive technologies for (advanced) chip packaging
The Netherlands excels in additive manufacturing (2D/3D printing) and equipment development. The combination of these two fields presents a unique and golden opportunity to provide a solution to the problems mentioned above. Additive manufacturing has the potential to significantly reduce packaging costs whilst minimising the environmental impact. On the one hand, this will make advanced packaging viable again in Europe, particularly for EU-relevant chips in the medical, energy and automotive sectors. On the other hand, the use of additive technologies will require new equipment to be developed – a specific area of strength for the Netherlands. This may also require the development of new process steps and possibly even new materials. Some good and recent examples of this are the Holst Centre start-ups FononTech, the LIFT (laser-induced forward transfer)-based assembly technology developed at ITEC, and the first printed packaging concepts realised at CITC in Nijmegen.
Reducing the environmental impact of (advanced) chip packaging
Advanced chip packaging places a heavy burden on the environment. This acts as a barrier to resuming production in the Netherlands and Europe. To address this, this theme is seeking the following types of PPS projects:
Replacing environmentally harmful materials in existing and new chip packages. For example: eliminating the use of toxic materials such as Pb solder (a mixture of tin and lead), PFAS and thermosetting moulding materials.
Development of new (environmentally friendly) materials for chip packaging. For example: new chip attach materials.
Modelling, testing and simulating (advanced) chip packaging
Based on design and material properties, a model of the component/chip can be constructed, after which it can be simulated to assess whether the functionality and reliability will meet the requirements for the application. During the operation of the chip, thermo-mechanical properties will play a significant role due to the high currents and switching speeds, which in turn strongly influence the electrical behaviour. This drastically increases energy consumption and may reduce reliability. This requires special designs and/or new materials for cooling, for example, but also for the electrical connections. To develop such designs, multi-physics finite element method (FEM) models must be developed and simulations carried out using them. These results must be validated using special test structures/methodologies to ultimately arrive at accurate results for optimisation. Depending on the application or type of circuit, compact (physically based) models must then be developed based on the optimised system designs. These models and test methodologies can subsequently be used for predictive purposes. Integrated photonics faces additional challenges. Photonic integrated circuits (PICs) must be integrated with electronics to form a system; therefore, a set of global design guidelines is important (gate spacing, grid coupler designs). Furthermore, for system applications and miniaturisation, it is important to package optical and electronic components on a single substrate. PICs with electronic ICs can suffer from thermal crosstalk, which can lead to alignment problems in the PIC; therefore, a detailed thermal analysis model must be developed to define tolerances in optical packages.
Development of new functionalities for advanced chip packaging
One of the differences between traditional and advanced packaging is that more functionality needs to be incorporated into the package. For example, antenna structures, optical structures for integrated optocouplers for galvanic isolation or detection, but also, for instance, microfluidic structures to enable chip cooling in power electronics. We are looking for PPS projects in which specific new (advanced) chip packaging functionalities are developed and tested in existing or new (advanced) chip packages.
The relationship between urgent transitions, KIAs and technologies
Urgente transities
The ‘Advanced Chip Packaging’ strategic programme focuses primarily on the transition to key technologies, in particular ‘semiconductor technologies’. Within semiconductor technologies, this programme focuses specifically on the ‘packaging’ of chips (‘chip packaging’). The growing interest in advanced packaging, as a key technology for continuing Moore’s Law, stems from the increasing complexity of semiconductors and the shift towards higher levels of chip integration (i.e. combining different semiconductor and even photonics front-end technologies into a single component). This means that the design and production of both the ‘chip’ and the ‘package’ must be carried out jointly. As the Boston Consulting Group (BCG) puts it: “Packaging will become a driver of innovation, a point of differentiation that is crucial to system performance.” (“Advanced Packaging Is Reshaping the Chip Industry”). The proposed programme is an implementation of part of the third pillar of the chipNL plan.
KIA's
The Energy Transition and Sustainability KIA comprises six (5) missions, which in turn encompass thirteen “Multi-year Mission-driven Innovation Programmes” (MMIPs). The path to achieving these missions will be significantly supported by the early availability of innovations in microelectronics. In particular, the sustainable and emission-free energy systems of the future, often referred to as smart grids, are cyber-physical systems (CPSs) that integrate physical dynamics (sensors and actuators) with computational, control and communication functions (networks). In such systems, new electronics are ubiquitous. For example, to process renewable energy, microelectronic energy solutions are required, whilst to integrate physical dynamics, sensors and actuators will be needed. Control software will run on new (often energy-efficient, low-voltage and AI-supported) hardware platforms, and new communication technology (5G and beyond) will be required to meet the strict latency and throughput requirements necessary in an Internet of Energy (IoE) environment.
Health & Care
Innovation in electronics will play a key role in enabling the healthcare systems of the future, so that they can address the challenges associated with the five missions defined in this KIA. Of particular importance are innovations that lead to efficient and affordable devices for the diagnosis, monitoring and treatment of patients. The main technical challenges for chip/actuator packages will include improving sensor quality, reducing the form factor (miniaturisation of components and systems), reducing energy consumption, ensuring biocompatibility and achieving reliable communication.
Circular economy
Traditionally, etching processes are used to produce lead frames and substrates, whereby excess material is removed to create the semi-finished products. This etching process is highly environmentally unfriendly because it uses aggressive chemicals and, moreover, proportionally very little of the material actually ends up in the end product. For encapsulation with plastic, (compression) moulding is almost always used, whereby a thermosetting plastic is poured into a mould around the products. The plastics used cannot be recycled. The Advanced Chip Packaging Programme aims to develop new materials and processes to add new functionality to the package.
Social earning capacity
The SP Advanced Chip Packaging initiative is in line with the vision of economic autonomy, which prioritises shared interests over those of other major powers. The increasing complexity of semiconductors and the shift towards higher levels of chip integration mean that the design and production of both the ‘chip’ and the ‘package’ must be carried out jointly. For this reason, major semiconductor front-end players are exploring whether they can once again develop advanced chip packages in-house in order to differentiate themselves and bring the technology back to the West. As BCG puts it: “Packaging will become a driver of innovation, a point of differentiation that is crucial to system performance.”
Safety
Given recent geopolitical trends and the rapidly deteriorating security situation, strengthening our defence capabilities is becoming increasingly important. Expertise in the field of Advanced Packaging is a crucial element in this regard, and Thales, for example, was therefore a participant in the packaging pillar of chipNL.
Technologies
Innovations in advanced chip packaging for microelectronics are enabling transitions across various application areas. The Electronics Roadmap is the fundamental roadmap against which research organisations and private companies will develop new microelectronics design technologies and the necessary packaging options. The High-Performance Materials roadmap is important for new materials, whilst nanotechnology, semiconductor equipment and photonics exemplify the areas that will benefit from advances in advanced packaging for microelectronics.